Nkwupụta nzuzo: Nzuzo gị dị anyị ezigbo mkpa. Companylọ ọrụ anyị na-ekwe nkwa igosipụta ozi nkeonwe gị na mgbasa ozi ọ bụla na-egosi na ọ bụla e ji ikike doo.
Ihe Nlereanya.: NSO4GU3AB
Ụgbọ njem: Ocean,Air,Express,Land
Ụdị Ụgwọ: L/C,T/T,D/A
Enweghi ike: FOB,EXW,CIF
4GB 1600mhz 240-pin Ddr3 udimm
Ntughari Akụkọ
Revision No. |
History |
Draft Date |
Remark |
1.0 |
Initial Release |
Apr. 2022 |
|
Inye Isiokwu Ozi
Model |
Density |
Speed |
Organization |
Component Composition |
NS04GU3AB |
4GB |
1600MHz |
512Mx64bit |
DDR3 256Mx8 *16 |
Nkowa
HDEngStar Unbuffed Ddr3 SDRAM DOMS (Unguffed okpukpu abụọ data na-eme ka iche iche na-ebe nchekwa) bụ ike ebe nchekwa, modulu na-eme ngwa ngwa na-eji ngwaọrụ DDR3. NS04GU3AB bụ 512m X 60-bit abụọ 4GB RDR3-1600 CLDR3-1600 CLDRAM Ngwaahịa Dumm, dabere na usoro iri na isii x 8-bit fbga. A na-eme SPD na mpaghara Jedec Standard Ddr3-1600 oge nke 11-11-11 na 1.5v. Nke ọ bụla 240-pin Dinm na-eji mkpịsị aka ọla edo edo edo. Ebumnuche SDRMEFEDDEDEDEDEDEDEDEDE maka iji dị ka ebe nchekwa ma etinyere n'usoro dị ka PC na ọrụ.
EGO
IFPOWA: VDD = 1.5v (1.425v rue 1.575v)
vddq = 1.5v (1.425V ruo 1.575v)
800mhz Fck maka 1600MB / sec / pin
bandlọ akụ nkeonwe
Passlọ ọrụ Canprogramimambible: 11, 10, 9, 8, 7, 6
Ana m atụ anya nkọ: 0, cl - 2, ma ọ bụ elekere - 1
8-bit pre-fatch
Нryburst Ogologo: 8 (na-enweghị oke ọ bụla, usoro ọ bụla na mbido "naanị) nke na-anaghị ekwe ka ọ na-agụ akwụkwọ ma ọ bụ na-eji A12 ma ọ bụ Mrs]
bi-nduzi data dị iche iche
Icental (onwe gi); Ihu onwe onye nke onwe ya site na ZQ PIN (RZQ: 240 Ohm ± 1%)
on nwụnahụ site na iji pint pin
eaverage Rueen na-eme ka Oge Nta 85 Celsius C, 3.9us na 85 Celsius C <95 Celsius C
chronous Reset
À na-eme ka data dị ike
ellly-site na Topology
PCB: ịdị elu 1.18 "(30mm)
rohs na-agba mbọ na halogen-Free
Isi usoro usoro
MT/s |
tRCD(ns) |
tRP(ns) |
tRC(ns) |
CL-tRCD-tRP |
DDR3-1600 |
13.125 |
13.125 |
48.125 |
2011/11/11 |
Tebụl adresị
Configuration |
Refresh count |
Row address |
Device bank address |
Device configuration |
Column Address |
Module rank address |
4GB |
8K |
32K A[14:0] |
8 BA[2:0] |
2Gb (256 Meg x 8) |
1K A[9:0] |
2 S#[1:0] |
Nkọwa PIN
Symbol |
Type |
Description |
Ax |
Input |
Address inputs: Provide the row address for ACTIVE commands, and the column |
BAx |
Input |
Bank address inputs: Define the device bank to which an ACTIVE, READ, WRITE, or |
CKx, |
Input |
Clock: Differential clock inputs. All control, command, and address input signals are |
CKEx |
Input |
Clock enable: Enables (registered HIGH) and disables (registered LOW) internal circuitry |
DMx |
Input |
Data mask (x8 devices only): DM is an input mask signal for write data. Input data is |
ODTx |
Input |
On-die termination: Enables (registered HIGH) and disables (registered LOW) |
Par_In |
Input |
Parity input: Parity bit for Ax, RAS#, CAS#, and WE#. |
RAS#, |
Input |
Command inputs: RAS#, CAS#, and WE# (along with S#) define the command being |
RESET# |
Input |
Reset: RESET# is an active LOW asychronous input that is connected to each DRAM and |
Sx# |
Input |
Chip select: Enables (registered LOW) and disables (registered HIGH) the command |
SAx |
Input |
Serial address inputs: Used to configure the temperature sensor/SPD EEPROM address |
SCL |
Input |
Serial |
CBx |
I/O |
Check bits: Used for system error detection and correction. |
DQx |
I/O |
Data input/output: Bidirectional data bus. |
DQSx, |
I/O |
Data strobe: Differential data strobes. Output with read data; edge-aligned with read data; |
SDA |
I/O |
Serial |
TDQSx, |
Output |
Redundant data strobe (x8 devices only): TDQS is enabled/disabled via the LOAD |
Err_Out# |
Output (open |
Parity error output: Parity error found on the command and address bus. |
EVENT# |
Output (open |
Temperature event: The EVENT# pin is asserted by the temperature sensor when critical |
VDD |
Supply |
Power supply: 1.35V (1.283–1.45V) backward-compatible to 1.5V (1.425–1.575V). The |
VDDSPD |
Supply |
Temperature sensor/SPD EEPROM power supply: 3.0–3.6V. |
VREFCA |
Supply |
Reference voltage: Control, command, and address VDD/2. |
VREFDQ |
Supply |
Reference voltage: DQ, DM VDD/2. |
VSS |
Supply |
Ground. |
VTT |
Supply |
Termination voltage: Used for control, command, and address VDD/2. |
NC |
– |
No connect: These pins are not connected on the module. |
NF |
– |
No function: These pins are connected within the module, but provide no functionality. |
Ihe ndetu : tebụl Nkọwapụta PIN dị n'okpuru bụ ndepụta zuru oke nke eserese niile enwere ike ịnwere. Eserese niile edepụtara nwere ike A naghị akwado ya na modul a. Lee PIN ọrụ maka ozi akọwapụtara modulu a.
A na-arụ ọrụ na-egbochi achịcha
4GB, 512mx644 (2rnk nke x8)
Modulu akụkụ
Ihu n'ihu
Ihu n'ihu
Ndetu:
1. Ogologo ya na milimita (sentimita); Max / min ma ọ bụ ụdị (ụdị) ebe ahụ.
2.nwe ogo ya na akụkụ niile dị mkpụmkpụ ± 0.15mm belụsọ ma akọwapụtara ya.
3. Eserese eserese bụ naanị maka.
Ngwaahịa : Indullọ Ọrụ Nlekọta Modul
Nkwupụta nzuzo: Nzuzo gị dị anyị ezigbo mkpa. Companylọ ọrụ anyị na-ekwe nkwa igosipụta ozi nkeonwe gị na mgbasa ozi ọ bụla na-egosi na ọ bụla e ji ikike doo.
Dejupụta ozi ndị ọzọ ka ọ nwee ike ịkpọtụrụ gị ngwa ngwa
Nkwupụta nzuzo: Nzuzo gị dị anyị ezigbo mkpa. Companylọ ọrụ anyị na-ekwe nkwa igosipụta ozi nkeonwe gị na mgbasa ozi ọ bụla na-egosi na ọ bụla e ji ikike doo.